DFT Engineer

TL;DR

DFT Engineer (Hardware): Developing and implementing Design for Test (DFT) strategies for silicon chips with an accent on MBIST, scan insertion, and ATPG. Focus on silicon bring-up, yield improvement, and ATE pattern development to ensure hardware reliability and manufacturability.

Location: Onsite in Austin, Texas, USA

Salary: $129,400 – $207,000 per year

Company

hirify.global is a global leader in semiconductor and infrastructure software solutions.

What you will do

• Implement block and chip-level DFT, including MBIST architecture and scan insertion.
• Develop ATE patterns, manage the hand-off process, and perform silicon debugging.
• Collaborate with ATE engineers to drive yield analysis and improvement.
• Execute DFT lint checking and pattern simulation for both MBIST and scan.
• Work cross-functionally with design, verification, and product development teams during silicon bring-up.

Requirements

• BSEE with 12+ years or MSEE with 8+ years of relevant engineering experience.
• Proven experience in silicon bring-up and yield improvement.
• Strong expertise in RTL lint checking, scan compression, scan insertion, and the ATPG process.
• Proficiency with Mentor Tessent/Synopsys DFT and simulation tool suites.
• Solid understanding of digital logic fundamentals and proficiency with Perl or other scripting languages.
• Must be located in or have the right to work in the USA (specifically Austin, TX).

Nice to have

• Experience in STA constraint development in DFT modes.

Culture & Benefits

• Comprehensive medical, dental, and vision plans.
• 401(k) participation with company matching.
• Equity opportunities including new hire grants and annual equity awards.
• Employee Stock Purchase Program (ESPP) and Employee Assistance Program (EAP).
• Company paid holidays, paid sick leave, and vacation time.