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2 дня назад

Principal Validation Lead (ASIC/SoC)

150 680 - 225 700$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR

Principal Validation Lead (ASIC/SoC): Owning lab validation strategy and execution for advanced ASIC/SoC products integrating CXL 3.x, HBM, DDR, and PCIe with an accent on silicon bring-up and high-speed interface debug. Focus on developing validation methodologies, driving cross-functional root-cause investigations, and mentoring junior engineers to ensure product reliability.

Location: Onsite in Santa Clara, CA

Salary: $150,680 – $225,700 per annum

Company

hirify.global is a semiconductor company providing essential building blocks for data infrastructure across enterprise, cloud, and AI architectures.

What you will do

  • Define overall validation strategy and test plans for ASIC/SoC devices focusing on CXL 3.x, HBM, DDR, PCIe, and high-speed SerDes interfaces.
  • Lead silicon bring-up and lab validation, including platform bring-up and interface-level validation.
  • Provide technical direction, test plan reviews, and debug guidance to the validation engineering team.
  • Operate advanced lab equipment such as high-bandwidth oscilloscopes, protocol analyzers, and BERTs.
  • Drive the development of lab automation and data analysis infrastructure using Python, TCL, or MATLAB.
  • Lead root-cause investigations across silicon, firmware, and board design to ensure issue closure.

Requirements

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field.
  • 8+ years of industry experience in silicon or system validation with extensive hands-on lab work.
  • Strong expertise in at least two of the following: CXL, PCIe (Gen4/5/6), DDR (4/5), HBM, or high-speed SerDes.
  • Proven experience leading bring-up and validation of complex ASIC/SoC products.
  • Strong scripting and lab automation skills (Python, TCL, shell, MATLAB).
  • Must be eligible to access export-controlled information under U.S. export control laws (EAR).

Nice to have

  • Master’s degree in Electrical Engineering or Computer Engineering.
  • Experience leading small validation teams or multi-site projects.
  • Familiarity with DFT features such as scan, BIST, and JTAG.
  • Experience with signal integrity/power integrity (SI/PI) concepts.

Culture & Benefits

  • Employee stock purchase plan with a 2-year look back.
  • Comprehensive financial well-being and family support programs.
  • Robust mental and physical health resources.
  • Recognition and service awards to celebrate contributions and milestones.

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