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4 дня назад

SoC/IP Design Verification Engineer

Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
c1
Страна
Mexico
Вакансия из списка Hirify.GlobalВакансия из Hirify RU Global, списка компаний с восточно-европейскими корнями
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Описание вакансии

Текст:
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TL;DR

SoC/IP Design Verification Engineer (Hardware): Driving verification for complex SoC/IP blocks with an accent on UVM testbench development, coverage closure, and debug across block and subsystem levels. Focus on architecting scalable verification environments, implementing constrained-random stimulus, and collaborating with cross-functional teams to ensure high-quality silicon delivery.

Location: Must be based in Guadalajara, Mexico (On-site)

Company

hirify.global is a global leader in semiconductor technology, creating processors and solutions that power the cloud, IoT, and 5G connectivity.

What you will do

  • Own the verification lifecycle including test plan definition, coverage strategy, and signoff.
  • Architect and implement UVM environments with reusable components.
  • Develop test content including constrained-random sequences and scenario tests.
  • Debug failures across simulation and emulation environments.
  • Drive functional and code coverage closure to ensure feature completeness.
  • Collaborate with RTL design, architecture, and firmware teams to ensure testability.

Requirements

  • Bachelor's degree in Electrical or Computer Engineering.
  • 5+ years of experience in SoC/IP design verification.
  • Expertise in UVM and SystemVerilog development.
  • Proven debug skills in simulation/emulation environments.
  • Advanced English proficiency required.
  • Must have unrestricted, permanent right to work in Mexico (no sponsorship).

Nice to have

  • Experience with protocols like AXI, PCIe, DDR, or MIPI.
  • Knowledge of assertion-based verification (SVA) and formal verification.
  • Experience with power-aware verification (UPF/CPF).
  • Familiarity with emulation/FPGA prototyping tools.
  • Experience leading small teams or driving tapeout signoff.

Culture & Benefits

  • Opportunity to work on cutting-edge semiconductor technology.
  • Collaborative environment with cross-functional engineering teams.
  • Focus on innovation and continuous methodology improvement.
  • Commitment to ethical hiring and Responsible Business Alliance standards.

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