Principal Design Engineer (Physical Design)

TL;DR

Principal Design Engineer (Physical Design): Implementing high-speed digital DDR PHY IP with an accent on PPA optimization and PD design flow enhancement. Focus on executing Floorplan, CTS, and STA for cutting-edge process nodes up to 2nm.

Location: Shanghai

Company

hirify.global is a leading provider of electronic design automation (EDA) software and hardware tools.

What you will do

• Implement high-speed digital DDR PHY IP.
• Develop scripts and tools to enhance current physical design (PD) flows.
• Resolve design issues and establish verification flows to prevent recurrence.
• Analyze and implement PPA optimization methodologies for various projects.
• Execute project tasks across advanced process nodes (TSMC/Samsung 2nm-12nm).

Requirements

• BS with 7+ years or MS with 5+ years of experience in digital implementation.
• Expertise in Floorplan, CTS, STA, Physical verification, and Power analysis.
• Strong background in circuits, electronics, and physics.
• Proficiency in scripting languages including Perl, C shell, TCL, Makefile, and Python.
• Experience with EDA tools such as Innovus, ICC, Calibre, Tempus, and PrimeTime.